TB-FMCH-DP

DisplayPort FPGA Mezzanine Card (FMC)

Features

• 4 Channel TX
  
• 4 Channel RX
• Uses FMC High Pin Count Connector (HPC)
  
• Evaluation version of the DisplayPort LogiCore will ship in TB-CVK-PRO kit

References

General

• VESA DisplayPort Website

Schematic

• Email Request

Articles

• "An FPGA Route Toward Implementing DisplayPort", by Carol Fields, Neal Kendall.
  Xilinx XCell Journal #71. Second Quarter 2010. Page 30.

Reference Designs

• "Implementing a DisplayPort Source Policy Maker Using a MicroBlaze Embedded Processor" (XAPP493)
  

IP Cores

• Xilinx DisplayPort LogiCORE IP Sell Sheet
• Xilinx DisplayPort LogiCORE (EF-DI-DISPLAYPORT) including Spartan-6 TED CVK-PRO demo files.
  
• DisplayPort Offerings and Software Requirements
• DisplayPort IP Core Evaluation
  
• Xilinx LogiCORE™ IP DisplayPort™ v2.1 (UG767)
• Xilinx LogiCORE™ IP DisplayPort™ Sink Core v1.3 (UG697)
• Xilinx LogiCORE™ IP DisplayPort™ Source Core v1.3 (UG696)

Technical Support

Support in North America for this product is provided by Aspen Logic. (Support for third party hardware and/or software and/or IP is provided through the third party (such as Xilinx) and not by us.)

Note that this product may require user modification of the board for use with the Xilinx ML605 carrier board. Any such modifications will void the board warranty.

Please open a ticket with your technical support issue or question or call us at 303|800|5859.

Please be advised that Aspen Logic, Inc. hereby disclaims any warranties, express or implied, including warranties of merchantability, fitness for a particular purpose, or noninfringement with respect to any such products and/or services. Tokyo Electron Device Ltd. warrants its products for two weeks from the date of purchase.