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TB-6V-{LX240T|LX550T|SX475T}-PCIEXP

Virtex-6 PCI Express Gen2 Evaluation Platform

Features

  • PCIe second generation (5 Gbps) 
  • Gen2 x 8 lane (LX240T device) / Gen2 x 4 (LX550T device)
  • DDR3 SODIMM x2 (back-side)
  • FMC High Pin Count connector x2 with 8-lanes of GTX transceiver's per connector
  • microSD configuration
  • High-speed configuration from on-board NAND flash memory
  • SPI flash (128 Mbit)
  • Miscellaneous interfaces: MMCX clock input, RS-232, I2C, 4 x PushButton, 8 x Dip Switch, 20-pin GPIO header

Key Components

  • FPGA Xilinx XC6VLX240T/550T-2FFG1759 / XC6VSX475T-2FFG1759
  • SPI-FLASH: Numonyx M25P128-VMF6
  • FMC Connector (High-Pin): Samtec ASP-134486-01
  • FMC Connector (Low-Pin): Samtec ASP-134603-01
  • DDR3 SO-DIMM: SunMax SMD-N1G88-13H
  • MMCX Connector: Samtec MMCX-J-P-H-ST-TH1
  • General-Purpose I/F(GPIO): FCI 95278-101A14LF
  • Jitter Attenuator: IDT ICS8474001I-05
  • MicroSD Config Controller: Xilinx XC3S700AN-FG484

References

General

  • TB-6V-LX240T-PCIEXP Block Diagram

Schematic

  • Email Request

Logic Design

    Articles

    Reference Designs

    • High-speed DDR3 SDRAM SO-DIMM interface design (Verilog HDL)
    • PCI Express DMA design (Verilog HDL)

    Board Size

    • H130 x W300 (mm) Non-standard card height may not allow all PC enclosures to close.

    Technical Support

    Support in North America for this product is provided by Aspen Logic. (Support for third party hardware and/or software and/or IP is provided through the third party (such as Xilinx) and not by us.)

    Please call us at 303|800|5859 or open an Aspen Logic technical support ticket with your issue or question.

    Please be advised that Aspen Logic, Inc. hereby disclaims any warranties, express or implied, including warranties of merchantability, fitness for a particular purpose, or noninfringement with respect to any such products and/or services. Tokyo Electron Device Ltd. warrants its products for two weeks from the date of purchase.


    inrevium TB-6V-LX240T-PCIEXP
    inrevium TB-6V-LX240T-PCIEXP (click to enlarge)

    Request A Quote on the TB-6V-LX240T-PCIEXP

    for availability, price and lead time.


    Request A Quote on the TB-6V-LX550T-PCIEXP

    for availability, price and lead time.


    Request A Quote on the TB-6V-SX475T-PCIEXP

    for availability, price and lead time.

    The inrevium TB-6V- LX240T, LX365T, LX550T, and SX475T-PCIEXP make ideal evaluation platforms for the development of high-performance graphics engines for next-generation televisions and multi-function printers, or for the high-speed arithmetic processing found in high-performance computing applications. Fitted with industry-leading, high-capacity, Virtex-6 LXT or Virtex-6 SXT FPGA family devices, the standard platform delivers both exceptional performance via an 8-lane PCI Express® (LX240T) or 4-lane PCI Express (LX550T) Gen 2 interface and 2-channel 1,066 Mbps DDR3 SDRAM SO-DIMM high-speed memory interfaces for rapid evaluation of wide-bandwidth and high-speed data transfer systems.

    TED developed these new domain platforms in accordance with the Targeted Design Platform concept promoted by Xilinx and are fitted with the industry-standard FPGA mezzanine cards (FMC) connector that provides flexible support for a range of different external interfaces implemented on FMC daughter cards available from TED today in addition to providing a future-proof upgrade path as new interfaces are developed. Thus preserving the initial investment in the base board purchase. Using the platforms in conjunction with the supplied reference designs facilitates a significant reduction in the development workload required of complex FPGA designs hosting high-performance PCI Express applications, application software and similar tasks, resulting in customer end products being brought to market more quickly.



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