ASPENLOGIC®

The typical article on metastability in the flip flop synchronizer (used for clock domain crossing) delivers volumes about the MTBF ("Mean Time Between Failure") equation but falls short when explaining practical ways to manage the failure rate. This article reviews synchronizer MTBF and ...

Since 1987 and my first exposure to VHDL, I have seen the humble VARIABLE relegated to the backwaters for use only as combinatorial logic. Verilog coders seem constrained to do the same. This article presents a convention for using blocking assignments ...

The VHDL PROCESS, written with multiple WAIT statements, provides a powerful way to develop implicit state machines (ISM). The ISM lacks an explicit state variable ...